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NRF52811-QCAA-R7 Datasheet(PDF) 123 Page - Nordic Semiconductor |
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NRF52811-QCAA-R7 Datasheet(HTML) 123 Page - Nordic Semiconductor |
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123 / 444 page ![]() Peripherals Symbol Description Min. Typ. Max. Units IOH,HDL Current at VDD-0.4 V, output set high, high drive, VDD >= 1.7 V 3 mA tRF,15pF Rise/fall time, standard drive mode, 10-90%, 15 pF load1 9 ns tRF,25pF Rise/fall time, standard drive mode, 10-90%, 25 pF load1 13 ns tRF,50pF Rise/fall time, standard drive mode, 10-90%, 50 pF load1 25 ns tHRF,15pF Rise/Fall time, high drive mode, 10-90%, 15 pF load1 4 ns tHRF,25pF Rise/Fall time, high drive mode, 10-90%, 25 pF load1 5 ns tHRF,50pF Rise/Fall time, high drive mode, 10-90%, 50 pF load1 8 ns RPU Pull-up resistance 11 13 16 kΩ RPD Pull-down resistance 11 13 16 kΩ CPAD Pad capacitance 3 pF 6.9 GPIOTE — GPIO tasks and events The GPIO tasks and events (GPIOTE) module provides functionality for accessing GPIO pins using tasks and events. Each GPIOTE channel can be assigned to one pin. A GPIOTE block enables GPIOs to generate events on pin state change which can be used to carry out tasks through the PPI system. A GPIO can also be driven to change state on system events using the PPI system. Low power detection of pin state changes is possible when in System ON or System OFF. Instance Number of GPIOTE channels GPIOTE 8 Table 39: GPIOTE properties Up to three tasks can be used in each GPIOTE channel for performing write operations to a pin. Two tasks are fixed (SET and CLR), and one (OUT) is configurable to perform following operations: • Set • Clear • Toggle An event can be generated in each GPIOTE channel from one of the following input conditions: • Rising edge • Falling edge • Any change 6.9.1 Pin events and tasks The GPIOTE module has a number of tasks and events that can be configured to operate on individual GPIO pins. The tasks (SET[n], CLR[n] and OUT[n]) can be used for writing to individual pins, and the events (IN[n]) can be generated from changes occurring at the inputs of individual pins. The SET task will set the pin selected in CONFIG[n].PSEL to high. The CLR task will set the pin low. The effect of the OUT task on the pin is configurable in CONFIG[n].POLARITY , and can either set the pin high, set it low, or toggle it. 1 Rise and fall times based on simulations 4454_140 v1.0 123 |
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