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NRF52811-QCAA-R7 Datasheet(PDF) 143 Page - Nordic Semiconductor |
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NRF52811-QCAA-R7 Datasheet(HTML) 143 Page - Nordic Semiconductor |
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143 / 444 page  Peripherals Register Offset Description FORK[21].TEP 0x964 Channel 21 task end-point FORK[22].TEP 0x968 Channel 22 task end-point FORK[23].TEP 0x96C Channel 23 task end-point FORK[24].TEP 0x970 Channel 24 task end-point FORK[25].TEP 0x974 Channel 25 task end-point FORK[26].TEP 0x978 Channel 26 task end-point FORK[27].TEP 0x97C Channel 27 task end-point FORK[28].TEP 0x980 Channel 28 task end-point FORK[29].TEP 0x984 Channel 29 task end-point FORK[30].TEP 0x988 Channel 30 task end-point FORK[31].TEP 0x98C Channel 31 task end-point Table 50: Register overview 6.11.2.1 TASKS_CHG[n].EN (n=0..5) Address offset: 0x000 + (n × 0x8) Enable channel group n Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A W EN Enable channel group n Trigger 1 Trigger task 6.11.2.2 TASKS_CHG[n].DIS (n=0..5) Address offset: 0x004 + (n × 0x8) Disable channel group n Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A W DIS Disable channel group n Trigger 1 Trigger task 6.11.2.3 CHEN Address offset: 0x500 Channel enable register Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A-f RW CH[i] (i=0..31) Enable or disable channel i Disabled 0 Disable channel Enabled 1 Enable channel 4454_140 v1.0 143 |
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