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NRF52811-QCAA-R7 Datasheet(PDF) 156 Page - Nordic Semiconductor

Part # NRF52811-QCAA-R7
Description  nRF52811
PDF  444 Pages
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Manufacturer  NORDIC [Nordic Semiconductor]
Direct Link  https://www.nordicsemi.com/
Logo NORDIC - Nordic Semiconductor

NRF52811-QCAA-R7 Datasheet(HTML) 156 Page - Nordic Semiconductor

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Peripherals
100% duty cycle
New value load
Previously
loaded
duty cycle
0% duty cycle
LOOP.CNT
(LOOP.CNT - 1)
1
Loop counter
...
last loaded
duty cycle
maintained
Figure 55: Complex sequence (LOOP.CNT>0) starting with SEQ[1]
Note: If a sequence is in use in a simple or complex sequence, it must have a length of SEQ[n].CNT
> 0.
6.12.3 Limitations
Previous compare value is repeated if the PWM period is shorter than the time it takes for the EasyDMA
to retrieve from RAM and update the internal compare registers. This is to ensure a glitch-free operation
even for very short PWM periods.
6.12.4 Pin configuration
The OUT[n] (n=0..3) signals associated with each PWM channel are mapped to physical pins according to
the configuration of PSEL.OUT[n] registers. If PSEL.OUT[n].CONNECT is set to Disconnected, the associated
PWM module signal will not be connected to any physical pins.
The PSEL.OUT[n] registers and their configurations are used as long as the PWM module is enabled and
the PWM generation active (wave counter started). They are retained only as long as the device is in
System ON mode (see section POWER for more information about power modes).
To ensure correct behavior in the PWM module, the pins that are used must be configured in the GPIO
peripheral in the following way before the PWM module is enabled:
PWM signal
PWM pin
Direction
Output value
Comment
OUT[n]
As specified in PSEL.OUT[n]
(n=0..3)
Output
0
Idle state defined in GPIO OUT
register
Table 52: Recommended GPIO configuration before starting PWM generation
4454_140 v1.0
156



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