NRF52811-QCAA-R7 datasheet(349/444 Pages) NORDIC

349 / 444 page

Peripherals

Note that the TWI master does not stop by itself when the whole RAM buffer has been sent, or when an

error occurs. The STOP task must be issued, through the use of a local or PPI shortcut, or in software as

part of the error handler.

The TWI master cannot get stopped while it is suspended, so the STOP task has to be issued after the TWI

master has been resumed.

6.25.3 Master read sequence

A TWI master read sequence is started by triggering the STARTRX task. After the STARTRX task has been

triggered the TWI master will generate a start condition on the TWI bus, followed by clocking out the

address and the READ/WRITE bit set to 1 (WRITE = 0, READ = 1). The address must match the address of

the slave device that the master wants to read from. The READ/WRITE bit is followed by an ACK/NACK bit

(ACK=0 or NACK = 1) generated by the slave.

After having sent the ACK bit the TWI slave will send data to the master using the clock generated by the

master.

Data received will be stored in RAM at the address specified in the RXD.PTR register. The TWI master will

generate an ACK after all but the last byte received from the slave. The TWI master will generate a NACK

after the last byte received to indicate that the read sequence shall stop.

A typical TWI master read sequence is illustrated in The TWI master reading data from a slave on page

350. Occurrence 2 in the figure illustrates clock stretching performed by the TWI master following a

SUSPEND task.

A SUSPENDED event indicates that the SUSPEND task has taken effect; this event can be used to

synchronize the software.

The TWI master will generate a LASTRX event when it is ready to receive the last byte, this is illustrated

in The TWI master reading data from a slave on page 350. If RXD.MAXCNT > 1 the LASTRX event is

generated after sending the ACK of the previously received byte. If RXD.MAXCNT = 1 the LASTRX event is

generated after receiving the ACK following the address and READ bit.

The TWI master is stopped by triggering the STOP task, this task must be triggered before the NACK bit is

supposed to be transmitted. The STOP task can be triggered at any time during the reception of the last

byte. It is safe to use the shortcut between LASTRX and STOP to accomplish this.

Note that the TWI master does not stop by itself when the RAM buffer is full, or when an error occurs. The

STOP task must be issued, through the use of a local or PPI shortcut, or in software as part of the error

handler.

The TWI master cannot get stopped while it is suspended, so the STOP task has to be issued after the TWI

master has been resumed.

4454_140 v1.0

349

NRF52811-QCAA-R7 Datasheet(PDF) 349 Page - Nordic Semiconductor