NRF52810-QCAA-R datasheet(212/483 Pages) NORDIC

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Peripherals

Each TEP implements a fork mechanism that enables a second task to be triggered at the same time as the

task specified in the TEP is triggered. This second task is configured in the task end point register in the

FORK registers groups, e.g. FORK.TEP[0] is associated with PPI channel CH[0].

There are two ways of enabling and disabling PPI channels:

• Enable or disable PPI channels individually using the CHEN, CHENSET, and CHENCLR registers.

• Enable or disable PPI channels in PPI channel groups through the groups’ ENABLE and DISABLE tasks.

Prior to these tasks being triggered, the PPI channel group must be configured to define which PPI

channels belong to which groups.

Note that when a channel belongs to two groups m and n, and the tasks CHG[m].EN and CHG[n].DIS occur

simultaneously (m and n can be equal or different), the CHG[m].EN on that channel has priority.

PPI tasks (for example, CHG[0].EN) can be triggered through the PPI like any other task, which means they

can be hooked to a PPI channel as a TEP. One event can trigger multiple tasks by using multiple channels

and one task can be triggered by multiple events in the same way.

6.11.1 Pre-programmed channels

Some of the PPI channels are pre-programmed. These channels cannot be configured by the CPU, but can

be added to groups and enabled and disabled like the general purpose PPI channels. The FORK TEP for

these channels are still programmable and can be used by the application.

For a list of pre-programmed PPI channels, see the table below.

Channel

EEP

TEP

TIMER0->EVENTS_COMPARE[0]

RADIO->TASKS_TXEN

TIMER0->EVENTS_COMPARE[0]

RADIO->TASKS_RXEN

TIMER0->EVENTS_COMPARE[1]

RADIO->TASKS_DISABLE

RADIO->EVENTS_BCMATCH

AAR->TASKS_START

RADIO->EVENTS_READY

CCM->TASKS_KSGEN

RADIO->EVENTS_ADDRESS

CCM->TASKS_CRYPT

RADIO->EVENTS_ADDRESS

TIMER0->TASKS_CAPTURE[1]

RADIO->EVENTS_END

TIMER0->TASKS_CAPTURE[2]

RTC0->EVENTS_COMPARE[0]

RADIO->TASKS_TXEN

RTC0->EVENTS_COMPARE[0]

RADIO->TASKS_RXEN

RTC0->EVENTS_COMPARE[0]

TIMER0->TASKS_CLEAR

RTC0->EVENTS_COMPARE[0]

TIMER0->TASKS_START

Table 47: Pre-programmed channels

6.11.2 Registers

Base address

Peripheral

Instance

Description

Configuration

0x4001F000

PPI

Programmable peripheral interconnect

Table 48: Instances

Offset

Description

TASKS_CHG[0].EN

0x000

Enable channel group 0

TASKS_CHG[0].DIS

0x004

Disable channel group 0

TASKS_CHG[1].EN

0x008

Enable channel group 1

TASKS_CHG[1].DIS

0x00C

Disable channel group 1

TASKS_CHG[2].EN

0x010

Enable channel group 2

TASKS_CHG[2].DIS

0x014

Disable channel group 2

4430_161 v1.0

212

NRF52810-QCAA-R Datasheet(PDF) 212 Page - Nordic Semiconductor

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