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CybraTech (2000) Ltd.
SOC-3000/i Scale-On-Chip
ASIC
Technical Specification
Revision B
Page 66
July, 2002
Configuration Registers (CFR)” page 61.
3. Initialize the hardware controllers.
4. Enable the Global CFR Register: Write 0x00 to address C100H.
Controllers Clock Enable Register
Register C200H controls the clock source to the hardware controllers in the SOC-3000/i.
Each controller operation may be disabled by inhibiting its clock.
TABLE 34: CLOCK ENABLE REGISTER
ADDRESS
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
C200H
ADC
0
SLED
0
WDT
KBD
PLED
LCD
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