M38B76FD datasheet(92/110 Pages) RENESAS

92 / 110 page

38B7 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS

q Erase command

Input command code 2016 in the first transfer and command code

2016 again in the second transfer. When this is done, the

M38B79FF executes an erase command. Erase is initiated at the

last rising edge of the serial clock. The BUSY pin is driven high

during the erase operation. Erase is completed within 9.5 ms as

measured by the internal timer, and the BUSY pin is pulled low.

Note that data 0016 must be written to all memory locations before

executing the erase command.

Note: A erase operation is not completed by executing the erase

command once. Always be sure to execute a erase verify

command after executing the erase command. When the fail-

ure is found in the verification, the user must repeatedly ex-

ecute the erase command until the pass in the verification.

Refer to Figure 90 for the erase flowchart.

Fig. 95 Timings at erasing

q Erase verify command

The user must verify the contents of all addresses after complet-

ing the erase command. Input command code A016 in the first

transfer. Proceed and input the low-order 8 bits and the high-order

8 bits of the address and pull the OE pin low. When this is done,

the M38B79FF reads out the contents of the specified address,

and then latchs it into the internal data latch. When the OE pin is

released back high and serial clock is input to the SCLK pin, the

verify data that has been latched into the data latch is serially out-

put from the SDA pin.

Note: If any memory location where the contents have not been

erased is found in the erase verify operation, execute the op-

eration of “erase

→ erase verify” over again. In this case,

however, the user does not need to write data 0016 to memory

locations before erasing.

Fig. 96 Timings during erase verify

twE

SCLK

BUSY

SDA

tCH

tEC

00000100

Command code input (2016) Command code input (2016)

Erase

“H”

“L”

SCLK

BUSY

SDA

tCH

A15

tCH

tCREV

Command code input (A016) Verify address input (L)

Verify address input (H)

Verify data output

tWR

Verify read

tRC

Note : When outputting the verify data, the SDA pin is switched for output at the first falling edge of SCLK. The SDA pin is placed

in the floating state during the period of th(C-E) after the last rising edge of SCLK (at the 8th bit).

00000101

M38B76FD Datasheet(PDF) 92 Page - Renesas Technology Corp

M38B76FD Datasheet(HTML) 92 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL