R8C2K datasheet(348/471 Pages) RENESAS

348 / 471 page

R8C/2K Group, R8C/2L Group

17. Serial Interface

Rev.1.10

Dec 21, 2007

Page 331 of 450

REJ09B0406-0110

17.2.1

Bit Rate

In UART mode, the bit rate is the frequency divided by the UiBRG (i = 0 or 2) register.

Figure 17.12 shows the Calculation Formula of UiBRG (i = 0 or 2) Register Setting Value. Table 17.7 lists the

Bit Rate Setting Example in UART Mode (Internal Clock Selected).

Figure 17.12

Calculation Formula of UiBRG (i = 0 or 2) Register Setting Value

i = 0 to 1

NOTES:

1. For the high-speed on-chip oscillator, the correction value in the FRA7 register should be written into the FRA1

This applies when the high-speed on-chip oscillator is selected as the system clock and bits FRA22 to FRA20

in the FRA2 register are set to 000b (divide-by-2 mode). For the precision of the high-speed on-chip oscillator,

refer to 22. Electrical Characteristics.

Table 17.7

Bit Rate Setting Example in UART Mode (Internal Clock Selected)

Bit Rate

(bps)

UiBRG

Count

Source

System Clock = 20 MHz

System Clock = 18.432 MHz(1)

System Clock = 8 MHz

UiBRG

Setting

Value

Actual Time

(bps)

Setting

Error

(%)

UiBRG

Setting

Value

Actual Time

(bps)

Setting

Error

(%)

UiBRG

Setting

Value

Actual

Time

(bps)

Setting

Error

(%)

1200

129 (81h)

1201.92

0.16 119 (77h)

1200.00

0.00

51 (33h)

1201.92

0.16

2400

64 (40h)

2403.85

0.16

59 (3Bh)

2400.00

0.00

25 (19h)

2403.85

0.16

4800

32 (20h)

4734.85

-1.36

29 (1Dh)

4800.00

0.00

12 (0Ch)

4807.69

0.16

9600

129 (81h)

9615.38

0.16 119 (77h)

9600.00

0.00

51 (33h)

9615.38

0.16

14400

86 (56h)

14367.82

-0.22

79 (4Fh)

14400.00

0.00

34 (22h) 14285.71

-0.79

19200

64 (40h)

19230.77

0.16

59 (3Bh)

19200.00

0.00

25 (19h) 19230.77

0.16

28800

42 (2Ah)

29069.77

0.94

39 (27h)

28800.00

0.00

16 (10h) 29411.76

2.12

38400

32 (20h)

37878.79

-1.36

29 (1Dh)

38400.00

0.00

12 (0Ch) 38461.54

0.16

57600

21 (15h)

56818.18

-1.36

19 (13h)

57600.00

0.00

8 (08h) 55555.56

-3.55

115200

10 (0Ah)

113636.36

-1.36

9 (09h)

115200.00

0.00

−−

−

UART mode

• Internal clock selected

UiBRG register setting value =

Bit Rate

× 16

- 1

Fj: Count source frequency of the UiBRG register (f1, f8, or f32)

• External clock selected

fEXT

Bit Rate

× 16

- 1

fEXT: Count source frequency of the UiBRG register (external clock)

UiBRG register setting value =

i = 0 or 2

R8C2K Datasheet(PDF) 348 Page - Renesas Technology Corp

R8C2K Datasheet(HTML) 348 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL