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R8C2K Datasheet(PDF) 288 Page - Renesas Technology Corp |
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R8C2K Datasheet(HTML) 288 Page - Renesas Technology Corp |
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288 / 471 page ![]() R8C/2K Group, R8C/2L Group 16. Timers Rev.1.10 Dec 21, 2007 Page 271 of 450 REJ09B0406-0110 16.4.8 Reset Synchronous PWM Mode In this mode, 3 normal-phases and 3 counter-phases of the PWM waveform are output with the same period (three-phase, sawtooth wave modulation, and no dead time). Figure 16.112 shows a Block Diagram of Reset Synchronous PWM Mode, and Table 16.43 lists the Reset Synchronous PWM Mode Specifications. Figures 16.113 to 16.120 show the Registers Associated with Reset Synchronous PWM Mode and Figure 16.121 shows an Operating Example of Reset Synchronous PWM Mode. Refer to Figure 16.111 Operating Example of PWM Mode (Duty 0%, Duty 100%) for an operating example of PWM Mode with duty 0% and duty 100%. Figure 16.112 Block Diagram of Reset Synchronous PWM Mode Period TRDIOC0 TRDIOB0 TRDIOD0 TRDIOA1 TRDIOC1 TRDIOB1 TRDIOD1 PWM1 PWM2 PWM3 Waveform control TRDGRB0 register TRDGRA1 register TRDGRB1 register Normal-phase Counter-phase TRDGRA0 register TRDGRD0 register TRDGRC1 register TRDGRD1 register TRDGRC0 register Buffer(1) Normal-phase Counter-phase Normal-phase Counter-phase NOTE: 1. When bits BFC0, BFD0, BFC1, and BFD1 in the TRDMR register are set to 1 (buffer register). |
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