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R8C2K Datasheet(PDF) 289 Page - Renesas Technology Corp |
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R8C2K Datasheet(HTML) 289 Page - Renesas Technology Corp |
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289 / 471 page ![]() R8C/2K Group, R8C/2L Group 16. Timers Rev.1.10 Dec 21, 2007 Page 272 of 450 REJ09B0406-0110 j = either A, B, C, or D Table 16.43 Reset Synchronous PWM Mode Specifications Item Specification Count sources f1, f2, f4, f8, f32, fOCO40M External signal input to the TRDCLK pin (valid edge selected by a program) Count operations The TRD0 register is incremented (the TRD1 register is not used). PWM waveform PWM period : 1/fk × (m+1) Active level width of normal-phase : 1/fk × (m-n) Active level width of counter-phase: 1/fk × (n+1) fk:Frequency of count source m:Value set in the TRDGRA0 register n: Value set in the TRDGRB0 register (PWM1 output), Value set in the TRDGRA1 register (PWM2 output), Value set in the TRDGRB1 register (PWM3 output) Count start condition 1 (count starts) is written to the TSTART0 bit in the TRDSTR register. Count stop conditions • 0 (count stops) is written to the TSTART0 bit in the TRDSTR register when the CSEL0 bit in the TRDSTR register is set to 1. The PWM output pin holds output level before the count stops • When the CSEL0 bit in the TRDSTR register is set to 0, the count stops at the compare match in the TRDGRA0 register. The PWM output pin holds level after output change at compare match. Interrupt request generation timing • Compare match (the content of the TRD0 register matches content of registers TRDGRj0, TRDGRA1, and TRDGRB1). • The TRD0 register overflows TRDIOA0 pin function Programmable I/O port or TRDCLK (external clock) input TRDIOB0 pin function PWM1 output normal-phase output TRDIOD0 pin function PWM1 output counter-phase output TRDIOA1 pin function PWM2 output normal-phase output TRDIOC1 pin function PWM2 output counter-phase output TRDIOB1 pin function PWM3 output normal-phase output TRDIOD1 pin function PWM3 output counter-phase output TRDIOC0 pin function Output inverted every PWM period INT0 pin function Programmable I/O port, pulse output forced cutoff signal input, or INT0 interrupt input Read from timer The count value can be read by reading the TRD0 register. Write to timer The value can be written to the TRD0 register. Select functions • The active level of normal-phase and counter-phase and initial output level selected individually. • Buffer operation (Refer to 16.4.2 Buffer Operation.) • Pulse output forced cutoff signal input (Refer to 16.4.4 Pulse Output Forced Cutoff.) m+1 Normal-phase n+1 (When “L” is selected as the active level) Counter-phase m-n |
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