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R8C2K Datasheet(PDF) 311 Page - Renesas Technology Corp |
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R8C2K Datasheet(HTML) 311 Page - Renesas Technology Corp |
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311 / 471 page  R8C/2K Group, R8C/2L Group 16. Timers Rev.1.10 Dec 21, 2007 Page 294 of 450 REJ09B0406-0110 16.4.9.1 Transfer Timing from Buffer Register • Transfer from the TRDGRD0, TRDGRC1, or TRDGRD1 register to the TRDGRB0, TRDGRA1, or TRDGRB1 register. When bits CMD1 to CMD0 in the TRDFCR register are set to 10b, the content is transferred when the TRD1 register underflows. When bits CMD1 to CMD0 are set to 11b, the content is transferred at compare match between registers TRD0 and TRDGRA0. 16.4.9.2 A/D Trigger Generation Compare match between registers TRD0 and TRDGRA0 and TRD1 underflow can be used as the conversion start trigger of the A/D converter. The trigger is selected by bits ADEG and ADTRG in the TRDFCR register. Also, set the ADCAP bit in the ADCON0 register to 1 (starts by timer RD). |
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