R5F72115D160FPV datasheet(539/1228 Pages) RENESAS

539 / 1228 page

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 May. 08, 2008 Page 515 of 1200

REJ09B0344-0200

Note:

Data1

Data2

Data

Data1

Data2

Data

01201

TCNT_3

TCNT_4

TCNT_3

TCNT_4

TITCR[6:4]

TITCNT[6:4]

Data1

Data2

Data

A TGIA_3 interrupt has occurred

Buffer register modification timing

Buffer transfer-enabled period

Buffer register

Temporary register

General register

Buffer register

Temporary register

General register

Buffer register modification timing

Data1

Data

Data1

Data

Data1

Data

0120

TITCR[6:4]

TITCNT[6:4]

MD[3:0] in TMDR_3 = 1101

Buffer transfer at the crest is selected.

The skipping count is set to two.

T3AEN and T4VEN are set to 1 and cleared to 0, respectively.

(1) When the buffer register is modified within one carrier cycle after a TGIA_3 interrupt has occurred

(2) When the buffer register is modified after one carrier cycle has been passed from a TGIA_3 interrupt occurrence

Figure 10.77 Example of Operation when Buffer Transfer is Linked with Interrupt

Skipping (BTE1 = 1 and BTE0 = 0)

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