R5F72115D160FPV datasheet(735/1228 Pages) RENESAS

735 / 1228 page

Section 15 Serial Communication Interface with FIFO (SCIF)

Rev. 2.00 May. 08, 2008 Page 711 of 1200

REJ09B0344-0200

RDF

0/1

FER

Serial

data

Start

bit

Data

Parity

bit

Stop

bit

Start

bit

Data

Parity

bit

Stop

bit

RXI interrupt

request

One frame

Data read and RDF flag

read as 1 then cleared to 0

by RXI interrupt handler

ERI interrupt request

generated by receive

error

Idle state

(mark state)

Figure 15.8 Example of SCIF Receive Operation

(8-Bit Data, Parity, 1 Stop Bit)

15.4.3

Operation in Clocked Synchronous Mode

In clocked synchronous mode, the SCIF transmits and receives data in synchronization with clock

pulses. This mode is suitable for high-speed serial communication.

The SCIF transmitter and receiver are independent, so full-duplex communication is possible

while sharing the same clock. The transmitter and receiver are also 16-byte FIFO buffered, so

continuous transmitting or receiving is possible by reading or writing data while transmitting or

receiving is in progress.

Figure 15.9 shows the general format in clocked synchronous serial communication.

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

LSB

MSB

Don't care

One unit of transfer data (character or frame)

Serial data

Serial clock

Note: * High except in continuous transfer

Figure 15.9 Data Format in Clocked Synchronous Communication

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