R5F72115D160FPV datasheet(732/1228 Pages) RENESAS

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Section 15 Serial Communication Interface with FIFO (SCIF)

Rev. 2.00 May. 08, 2008 Page 708 of 1200

REJ09B0344-0200

• Receiving Serial Data (Asynchronous Mode)

Figures 15.6 and 15.7 show sample flowcharts for serial reception.

Use the following procedure for serial data reception after enabling the SCIF for reception.

Start of reception

Read ER, DR, BRK flags in

SCFSR and ORER

flag in SCLSR

ER, DR, BRK or ORER = 1?

Read RDF flag in SCFSR

RDF = 1?

Read receive data in

SCFRDR, and clear RDF

flag in SCFSR to 0

All data received?

Clear RE bit in SCSCR to 0

End of reception

Yes

Error handling

[1] Receive error handling and

break detection:

Read the DR, ER, and BRK

flags in SCFSR, and the

ORER flag in SCLSR, to

identify any error, perform the

appropriate error handling,

then clear the DR, ER, BRK,

and ORER flags to 0. In the

case of a framing error, a

break can also be detected by

reading the value of the RxD

pin.

[2] SCIF status check and receive

data read:

Read SCFSR and check that

RDF flag = 1, then read the

receive data in SCFRDR, read

1 from the RDF flag, and then

clear the RDF flag to 0. The

transition of the RDF flag from

0 to 1 can be identified by an

RXI interrupt.

[3] Serial reception continuation

procedure:

To continue serial reception,

read at least the receive

trigger set number of receive

data bytes from SCFRDR,

read 1 from the RDF flag, then

clear the RDF flag to 0. The

number of receive data bytes

in SCFRDR can be

ascertained by reading from

SCRFDR.

[1]

[2]

[3]

Figure 15.6 Sample Flowchart for Receiving Serial Data

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