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R5F72115D160FPV Datasheet(PDF) 825 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 825 Page - Renesas Technology Corp |
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825 / 1228 page ![]() Section 18 D/A Converter (DAC) Rev. 2.00 May. 08, 2008 Page 801 of 1200 REJ09B0344-0200 18.5 Usage Notes 18.5.1 Module Standby Mode Setting Operation of the D/A converter can be disabled or enabled using the standby control register. The initial setting is for operation of the D/A converter to be halted. Register access is enabled by canceling module standby mode. For details, see section 23, Power-Down Modes. 18.5.2 D/A Output Hold Function in Software Standby Mode When this LSI enters software standby mode with D/A conversion enabled, the D/A outputs are retained, and the analog power supply current is equal to as during D/A conversion. If the analog power supply current needs to be reduced in software standby mode, clear the DAOE0, DAOE1, and DAE bits to 0 to disable the D/A outputs. 18.5.3 Setting Analog Input Voltage The reliability of this LSI may be adversely affected if the following voltage ranges are exceeded. 1. AVcc and AVss input voltages Input voltages AVcc and AVss should be Vcc ≤ AVcc ≤ 5.0 V ± 0.5 V and AVss = Vss. Do not leave the AVcc and AVss pins open when the A/D converter or D/A converter is not in use and in software standby mode. When not in use, connect AVcc to the power supply (VccQ) and AVss to the ground (VssQ). 2. Setting range of AVREF input voltage Set the voltage range of the AVREF pin as AVREF = AVcc ± 0.3 V when the A/D converter or D/A converter is used, or as AVREF = AVcc when no A/D converter or D/A converter is used. |
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