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R5F72115D160FPV Datasheet(PDF) 822 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 822 Page - Renesas Technology Corp |
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822 / 1228 page ![]() Section 18 D/A Converter (DAC) Rev. 2.00 May. 08, 2008 Page 798 of 1200 REJ09B0344-0200 18.3.2 D/A Control Register (DACR) DACR is an 8-bit readable/writable register that controls the operation of the D/A converter. DACR is initialized to H'1F by a power-on reset or in module standby mode. 7654321 0 00011111 R/W R/W R/W - - - - - Bit: Initial value: R/W: DAOE1 DAOE0 DAE ----- Bit Bit Name Initial Value R/W Description 7 DAOE1 0 R/W D/A Output Enable 1 Controls D/A conversion and analog output for channel 1. 0: Analog output of channel 1 (DA1) is disabled 1: D/A conversion of channel 1 is enabled. Analog output of channel 1 (DA1) is enabled. 6 DAOE0 0 R/W D/A Output Enable 0 Controls D/A conversion and analog output for channel 0. 0: Analog output of channel 0 (DA0) is disabled 1: D/A conversion of channel 0 is enabled. Analog output of channel 0 (DA0) is enabled. 5 DAE 0 R/W D/A Enable Used together with the DAOE0 and DAOE1 bits to control D/A conversion. Output of conversion results is always controlled by the DAOE0 and DAOE1 bits. For details, see table 18.3. 0: D/A conversion for channels 0 and 1 is controlled independently 1: D/A conversion for channels 0 and 1 is controlled together 4 to 0 ⎯ All 1 ⎯ Reserved These bits are always read as 1 and cannot be modified. |
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