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R5F72115D160FPV Datasheet(PDF) 821 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 821 Page - Renesas Technology Corp |
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821 / 1228 page  Section 18 D/A Converter (DAC) Rev. 2.00 May. 08, 2008 Page 797 of 1200 REJ09B0344-0200 18.3 Register Descriptions The D/A converter has the following registers. Table 18.2 Register Configuration Register Name Abbreviation R/W Initial Value Address Access Size D/A data register 0 DADR0 R/W H'00 H'FFFE6800 8, 16 D/A data register 1 DADR1 R/W H'00 H'FFFE6801 8, 16 D/A control register DACR R/W H'1F H'FFFE6802 8, 16 18.3.1 D/A Data Registers 0 and 1 (DADR0 and DADR1) DADR is an 8-bit readable/writable register that stores data to which D/A conversion is to be performed. Whenever analog output is enabled, the values in DADR are converted and output to the analog output pins. DADR is initialized to H'00 by a power-on reset or in module standby mode. 7654321 0 00000000 R/W R/W R/W R/W R/W R/W R/W R/W Bit: Initial value: R/W: |
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