R5F72115D160FPV datasheet(817/1228 Pages) RENESAS

817 / 1228 page

Section 17 A/D Converter (ADC)

Rev. 2.00 May. 08, 2008 Page 793 of 1200

REJ09B0344-0200

17.7

Usage Notes

17.7.1

Analog Input Voltage Range

The voltage applied to analog input pin (ANn) during A/D conversion should be in the range

AVss

≤ ANn (n = 0 to 7) ≤ AVcc.

17.7.2

Relationship between AVcc, AVss and Vcc, Vss

When using the A/D converter, set AVcc = 5.0 V

±0.5 V and AVss = Vss. When the A/D

converter is not used, set Vcc

≤ AVcc ≤ 5.0V ±0.5V, AVss = Vss, and do not leave the AVcc pin

open.

17.7.3

Range of AVREF Pin Settings

Set AVREF = AVcc

±0.3 V and AVREFVss = AVss ±0.3 V. If these conditions are not met, the

reliability of the LSI may be adversely affected.

17.7.4

Notes on Board Design

In board design, digital circuitry and analog circuitry should be as mutually isolated as possible,

and the layout in which the digital circuit signal lines and analog circuit signal lines cross or are in

close proximity to each other should be avoided as much as possible. Failure to do so may result in

the incorrect operation of the analog circuitry due to inductance, adversely affecting the A/D

conversion values.

Also, digital circuitry must be isolated from the analog input signals (AN0 to AN7), analog

reference power supply (AVREF), the analog power supply (AVcc), the analog ground (AVss),

and the analog reference ground (AVREFVss). Also, AVss should be connected at one point to a

stable digital ground (Vss) on the board.

R5F72115D160FPV Datasheet(PDF) 817 Page - Renesas Technology Corp