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R5F72115D160FPV Datasheet(PDF) 906 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 906 Page - Renesas Technology Corp |
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906 / 1228 page ![]() Section 20 I/O Ports Rev. 2.00 May. 08, 2008 Page 882 of 1200 REJ09B0344-0200 20.4.2 Port F Data Register (PFDR) PFDR is a 16-bit read-only register that stores port F data. Bits PF1DR and PF0DR correspond to pins PF1 and PF0, respectively. Even if a value is written to PFDR, the value is not written into PFDR, and it does not affect the pin state. If PFDR is read, the pin state, not the register value, is returned directly. Table 20.8 summarizes PFDR read/write operations. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 00000000000000 ** RRRRRRRRRRRRRRRR Bit: Initial value: R/W: Note: Depends on the external pin state. * -------------- PF1 DR PF0 DR Bit Bit Name Initial Value R/W Description 15 to 2 ⎯ All 0 R Reserved These bits are always read as 0. The write value should always be 0. 1 PF1DR Pin state R See table 20.8. 0 PF0DR Pin state R Table 20.8 Port F Data Register (PFDR) Read/Write Operations • PFDR bits 1 and 0 Pin Function Read Write General input Pin state Ignored (no effect on pin state) Other than general input Pin state Ignored (no effect on pin state) |
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