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R5F72115D160FPV Datasheet(PDF) 1032 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 1032 Page - Renesas Technology Corp |
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1032 / 1228 page ![]() Section 23 Power-Down Modes Rev. 2.00 May. 08, 2008 Page 1008 of 1200 REJ09B0344-0200 23.4.3 Software Standby Mode Application Example This example describes a transition to software standby mode on the falling edge of the NMI signal, and cancellation on the rising edge of the NMI signal. The timing is shown in figure 23.1. When the NMI pin is changed from high to low level while the NMI edge select bit (NMIE) in ICR is set to 0 (falling edge detection), the NMI interrupt is accepted. When the NMIE bit is set to 1 (rising edge detection) by the NMI exception service routine, the STBY bit in STBCR is set to 1, and a SLEEP instruction is executed, software standby mode is entered. Thereafter, software standby mode is canceled when the NMI pin is changed from low to high level. CK NMI pin NMIE bit STBY bit LSI state Oscillator Program execution NMI exception handling NMI exception handling Exception service routine Software standby mode Oscillation settling time Figure 23.1 NMI Timing in Software Standby Mode (Application Example) |
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