M32CSLASH8A datasheet(359/372 Pages) RENESAS

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M32C/8A Group

24. Usage Notes

Rev.1.00

Jul 15, 2007

Page 342 of 352

REJ09B0385-0100

24.7

Timers

24.7.1

Timer A, Timer B

Timers are stopped after reset. Set the TAiS (i = 0 to 4) or TBjS (j = 0 to 5) bit in the TABSR or TBSR register

to 1 (count starts) after setting timer operating mode, count source, and counter value.

The following registers and bits must be changed while the TAiS or TBjS bit is set to 0 (count stops).

• Registers TAiMR and TBjMR

• UDF register

• Bits TAZIE, TA0TGL, and TA0TGH in the ONSF register

• TRGSR register

24.7.2

Timer A

24.7.2.1

Timer A (Timer Mode)

• The TAiS bit (i = 0 to 4) in the TABSR register is set to 0 (count stops) after reset. Set the TAiS bit to 1

(count starts) after selecting timer operating mode and setting the TAi register.

• The TAi register indicates a counter value while counting at any given time. However, FFFFh can be read

in the reload timing. A setting value can be read between when the TAi register is set while a counter stops

and when a counter is started.

24.7.2.2

Timer A (Event Counter Mode)

• The TAiS bit (i = 0 to 4) is set to 0 (count stops) after reset. Set the TAiS bit to 1 (count starts) after

selecting timer operating mode and setting the TAi register.

• The TAi register indicates a counter value while counting at any given time. However, FFFFh can be read

if the timer underflows or 0000h if the timer overflows, in the reload timing. A setting value can be read

between setting the TAi register while a counter stops and starting a counter.

M32C/8A Datasheet(PDF) 359 Page - Renesas Technology Corp