H838532H datasheet(283/508 Pages) RENESAS

283 / 508 page

Section 9 Timers

Rev. 1.00 May 30, 2008 Page 263 of 484

REJ09B0436-0100

Table 9.16

Input Capture Input Signal Input Edges Due to Noise Canceler Function

Switching, and Conditions for Their Occurrence

Input Capture Input Signal

Input Edge

Conditions

Generation of rising edge

When the TMIG pin level is switched from low to high while TMIG

is set to 1, then NCS is modified from 0 to 1 before the signal is

sampled five times by the noise canceler

Generation of falling edge

When the TMIG pin level is switched from high to low while TMIG

is set to 1, then NCS is modified from 1 to 0 before the signal is

sampled five times by the noise canceler

When the pin function is switched and an edge is generated in the input capture input signal, if

this edge matches the edge selected by the input capture interrupt select (IIEGS) bit, the

interrupt request flag will be set to 1. The interrupt request flag should therefore be cleared to 0

before use. Figure 9.15 shows the procedure for port mode register manipulation and interrupt

request flag clearing. When switching the pin function, set the interrupt-disabled state before

manipulating the port mode register, then, after the port mode register operation has been

performed, wait for the time required to confirm the input capture input signal as an input

capture signal (at least two system clocks when the noise canceler is not used; at least five

sampling clocks when the noise canceler is used), before clearing the interrupt enable flag to 0.

There are two ways of preventing interrupt request flag setting when the pin function is

switched: by controlling the pin level so that the conditions shown in tables 9.15 and 9.16 are

not satisfied, or by setting the opposite of the generated edge in the IIEGS bit in TMG.

H838532H Datasheet(PDF) 283 Page - Renesas Technology Corp