H8S2245 datasheet(414/818 Pages) RENESAS

414 / 818 page

Section 10 8-Bit Timers

Rev.3.00 Mar. 26, 2007 Page 372 of 772

REJ09B0355-0300

Bits 3 to 0—Output Select 3 to 0 (OS3 to OS0): These bits specify how the timer output level is

to be changed by a compare match of TCOR and TCNT.

Bits OS3 and OS2 select the effect of compare match B on the output level, bits OS1 and OS0

select the effect of compare match A on the output level, and both of them can be controlled

independently.

Note, however, that priorities are set such that: toggle output > 1 output > 0 output. If compare

matches occur simultaneously, the output changes according to the compare match with the higher

priority.

Timer output is disabled when bits OS3 to OS0 are all 0.

After a reset, the timer output is 0 until the first compare match event occurs.

Bit 3

Bit 2

OS3

OS2

Description

No change when compare match B occurs

(Initial value)

0 is output when compare match B occurs

1 is output when compare match B occurs

Output is inverted when compare match B occurs (toggle output)

Bit 1

Bit 0

OS1

OS0

Description

No change when compare match A occurs

(Initial value)

0 is output when compare match A occurs

1 is output when compare match A occurs

Output is inverted when compare match A occurs (toggle output)

H8S2245 Datasheet(PDF) 414 Page - Renesas Technology Corp