M32CSLASH86T datasheet(212/505 Pages) RENESAS

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Page 189

17. Serial I/O

)

(

UARTi Special Mode Register 2 (i=0 to 4)

Symbol

Address

After Reset

U0SMR2 to U4SMR2

036616, 02E616, 033616, 032616, 02F616

0016

IICM2

CSC

Clock Synchronous Bit

I2C Mode Select Bit 2

0: Output

1: No output (high-impedance)

Bit Name

Bit

Symbol

Function

ALS

STC

SWC2

SDHI

SWC

SCL Wait Output Bit

SDA Output Stop Bit

UARTi Initialize Bit

SCL Wait Output Bit 2

SDA Output Inhibit Bit

0: Disabled

1: Enabled

0: Disabled

1: Enabled

0: Output

1: No output

0: Disabled

1: Enabled

0: Transfer clock

1: "L" output

SU1HIM

External Clock

Synchronous Enable Bit

NOTES:

1. Refer to Table 17.14.

2. The external clock synchronous function can be selected by combining the SU1HIM bit and the

SCLKDIV bit in the UiSMR register.

SCLKDIV bit in the

UiSMR Register

SU1HIM bit in the

UiSMR2 Register

External Clock Synchronous Function

Selection

0 or 1

No synchronization

Same division as the external clock

External clock divided by 2

(Note 1)

(Note 2)

Figure 17.6 U0SMR2 to U4SMR2 Registers

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