M32CSLASH86T datasheet(214/505 Pages) RENESAS

214 / 505 page

Page 191

17. Serial I/O

)

(

UARTi Special Mode Register 4 (i=0 to 4)

Symbol

Address

After Reset

U0SMR4 to U4SMR4

036416, 02E416, 033416, 032416, 02F416

0016

Start Condition

Generate Bit(1)

Restart Condition

Generate Bit(1)

Stop Condition

Generate Bit(1)

SCL, SDA Output

Select Bit

ACK Data Bit

ACK Data Output

Enable Bit

0: Clear

1: Start

0: Clear

1: Start

0: Clear

1: Start

0: Selects the serial I/O circuit

1: Selects the start/stop condition

generating circuit

0: ACK

1: NACK

Bit Name

Bit

Symbol

Function

NOTES:

1. When each condition is generated, the STAREQ, RSTAREQ or STPREQ bit is set to "0".

When a condition generation is incomplete, the bit remains unchanged as "1".

SCL Wait Output Bit 3

SCL Output Stop

Enable Bit

0: SCL "L" hold disabled

1: SCL "L" hold enabled

0: Disabled

1: Enabled

0: Serial I/O data output

1: ACK data output

STSPSEL

ACKD

ACKC

SCLHI

STAREQ

STPREQ

RSTAREQ

SWC9

Figure 17.8 U0SMR4 to U4SMR4 Registers

M32C/86T Datasheet(PDF) 214 Page - Renesas Technology Corp

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