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M16C/62M Datasheet(PDF) 52 Page - Renesas Technology Corp |
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M16C/62M Datasheet(HTML) 52 Page - Renesas Technology Corp |
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52 / 615 page ![]() Mitsubishi microcomputers M16C / 62A Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Bus Control 1-33 Table 1.9.6. Microcomputer status in hold state Item Status Oscillation ON ___ _____ _______ R/W signal, address bus, data bus, CS, BHE Floating Programmable I/O ports P0, P1, P2, P3, P4, P5 Floating P6, P7, P8, P9, P10 Maintains status when hold signal is received __________ HLDA Output “L” Internal peripheral circuits ON (but watchdog timer stops) ALE signal Undefined __________ HOLD > DMAC > CPU (6) Hold signal The hold signal is used to transfer the bus privileges from the CPU to the external circuits. Inputting “L” to __________ the HOLD pin places the microcomputer in the hold state at the end of the current bus access. This status __________ __________ is maintained and “L” is output from the HLDA pin as long as “L” is input to the HOLD pin. Table 1.9.6 shows the microcomputer status in the hold state. __________ Bus-using priorities are given to HOLD, DMAC, and CPU in order of decreasing precedence. Figure 1.9.5. Bus-using priorities (7) External bus status when the internal area is accessed Table 1.9.7 shows the external bus status when the internal area is accessed. Table 1.9.7. External bus status when the internal area is accessed Item SFR accessed Internal ROM/RAM accessed Address bus Address output Maintain status before accessed address of external area Data bus When read Floating Floating When write Output data Undefined RD, WR, WRL, WRH RD, WR, WRL, WRH output Output “H” BHE BHE output Maintain status before accessed status of external area CS Output “H” Output “H” ALE Output “L” Output “L” |
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