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H8/3028F Datasheet(PDF) 359 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 359 Page - Renesas Technology Corp |
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359 / 923 page ![]() Rev. 2.00, 09/03, page 329 of 890 9.2.7 Timer Counters (16TCNT) 16TCNT is a 16-bit counter. The 16-bit timer has three 16TCNTs, one for each channel. Channel Abbreviation Function 0 16TCNT0 Up-counter 1 16TCNT1 2 16TCNT2 Phase counting mode: up/down-counter Other modes: up-counter Bit Initial value Read/Write 14 0 R/W 12 0 R/W 10 0 R/W 8 0 R/W 6 0 R/W 0 0 R/W 4 0 R/W 2 0 R/W 15 0 R/W 13 0 R/W 11 0 R/W 9 0 R/W 7 0 R/W 1 0 R/W 5 0 R/W 3 0 R/W Each 16TCNT is a 16-bit readable/writable register that counts pulse inputs from a clock source. The clock source is selected by bits TPSC2 to TPSC0 in 16TCR. 16TCNT0 and 16TCNT1 are up-counters. 16TCNT2 is an up/down-counter in phase counting mode and an up-counter in other modes. 16TCNT can be cleared to H'0000 by compare match with GRA or GRB or by input capture to GRA or GRB (counter clearing function). When 16TCNT overflows (changes from H'FFFF to H'0000), the OVF flag is set to 1 in TISRC of the corresponding channel. When 16TCNT underflows (changes from H'0000 to H'FFFF), the OVF flag is set to 1 in TISRC of the corresponding channel. The 16TCNTs are linked to the CPU by an internal 16-bit bus and can be written or read by either word access or byte access. Each 16TCNT is initialized to H'0000 by a reset and in standby mode. |
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