H8SLASH3028F datasheet(18/923 Pages) RENESAS

18 / 923 page

Rev. 2.00, 09/03, page xviii of xxx

2.9

Basic Operational Timing.................................................................................................. 52

2.9.1

Overview .............................................................................................................. 52

2.9.2

On-Chip Memory Access Timing ........................................................................ 52

2.9.3

On-Chip Supporting Module Access Timing....................................................... 53

2.9.4

Access to External Address Space ....................................................................... 54

Section 3 MCU Operating Modes................................................................................... 55

3.1

Overview ........................................................................................................................... 55

3.1.1

Operating Mode Selection.................................................................................... 55

3.1.2

3.2

Mode Control Register (MDCR)....................................................................................... 57

3.3

System Control Register (SYSCR).................................................................................... 58

3.4

Operating Mode Descriptions............................................................................................ 60

3.4.1

Mode 1 ................................................................................................................. 60

3.4.2

Mode 2 ................................................................................................................. 60

3.4.3

Mode 3 ................................................................................................................. 60

3.4.4

Mode 4 ................................................................................................................. 61

3.4.5

Mode 5 ................................................................................................................. 61

3.4.6

Mode 6 ................................................................................................................. 61

3.4.7

Mode 7 ................................................................................................................. 61

3.5

Pin Functions in Each Operating Mode............................................................................. 62

3.6

Memory Map in Each Operating Mode............................................................................. 63

3.6.1

Note on Reserved Areas ....................................................................................... 63

Section 4 Exception Handling.......................................................................................... 69

4.1

Overview ........................................................................................................................... 69

4.1.1

Exception Handling Types and Priority ............................................................... 69

4.1.2

Exception Handling Operation ............................................................................. 69

4.1.3

Exception Vector Table........................................................................................ 70

4.2

Reset .................................................................................................................................. 72

4.2.1

Overview .............................................................................................................. 72

4.2.2

Reset Sequence..................................................................................................... 72

4.2.3

Interrupts after Reset ............................................................................................ 75

4.3

Interrupts ........................................................................................................................... 76

4.4

Trap Instruction ................................................................................................................. 77

4.5

Stack Status after Exception Handling .............................................................................. 78

4.6

Notes on Stack Usage........................................................................................................ 79

Section 5 Interrupt Controller........................................................................................... 81

5.1

Overview ........................................................................................................................... 81

5.1.1

Features ................................................................................................................ 81

5.1.2

Block Diagram ..................................................................................................... 82

5.1.3

Pin Configuration ................................................................................................. 83

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