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H8/3028F Datasheet(PDF) 478 Page - Renesas Technology Corp

Part # H8/3028F
Description  Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
PDF  923 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8/3028F Datasheet(HTML) 478 Page - Renesas Technology Corp

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Rev. 2.00, 09/03, page 448 of 890
12.4
Interrupts
During interval timer operation, an overflow generates an interval timer interrupt (WOVI). The
interval timer interrupt is requested whenever the OVF bit is set to 1 in TCSR.
12.5
Usage Notes
Contention between TCNT Write and Increment: If a timer counter clock pulse is generated
during the T3 state of a write cycle to TCNT, the write takes priority and the timer count is not
incremented. See figure 12.8.
φ
TCNT
TCNT
NM
Counter write data
T 3
T 2
T 1
CPU: TCNT write cycle
Internal write
signal
TCNT input
clock
Figure 12.8 Contention between TCNT Write and Count up
Changing CKS2 to CKS0 Bit: Halt TCNT by clearing the TME bit to 0 in TCSR before
changing the values of bits CKS2 to CKS0.



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