H8SLASH3028F datasheet(500/923 Pages) RENESAS

500 / 923 page

Rev. 2.00, 09/03, page 470 of 890

Bit 1—Multiprocessor bit (MPB): Stores the value of the multiprocessor bit in the receive data

when a multiprocessor format is used in asynchronous mode. MPB is a read-only bit, and cannot

be written.

Bit 1

MPB

Description

Multiprocessor bit value in receive data is 0*

(Initial value)

Multiprocessor bit value in receive data is 1

Note: * If the RE bit in SCR is cleared to 0 when a multiprocessor format is selected, MPB retains

its previous value.

Bit 0—Multiprocessor Bit Transfer (MPBT): Stores the value of the multiprocessor bit added to

transmit data when a multiprocessor format in selected for transmitting in asynchronous mode.

The MPBT bit setting is ignored in synchronous mode, when a multiprocessor format is not

selected, or when the SCI cannot transmit.

Bit 1

MPBT

Description

Multiprocessor bit value in transmit data is 0

(Initial value)

Multiprocessor bit value in transmit data is 1

13.2.8

Bit Rate Register (BRR)

BRR is an 8-bit register that., together with the CKS1 and CKS0 bits in SMR that select the baud

rate generator clock source, determines the serial communication bit rate.

Bit

654321

Initial value

Read/Write

R/W

The CPU can always read and write BRR. BRR is initialized to H'FF by a reset and in standby

mode. Each SCI channel has independent baud rate generator control, so different values can be

set in the three channels.

Table 13.3 shows examples of BRR settings in asynchronous mode. Table 13.4 shows examples

of BRR settings in synchronous mode.

H8/3028F Datasheet(PDF) 500 Page - Renesas Technology Corp