H8SLASH3028F datasheet(561/923 Pages) RENESAS

Part #	H8/3028F

Description	Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

PDF	923 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

561 / 923 page

Rev. 2.00, 09/03, page 531 of 890

Initialization

Read RDR and clear

RDRF flag to 0 in SSR

Clear RE bit to 0

Start receiving

Start

Error handling

Yes

ORER = 0

and PER = 0?

RDRF = 1?

All data received?

Yes

Figure 14.8 Sample Reception Processing Flowchart

The above procedure may include interrupt handling and DMA transfer.

If reception ends and the RDRF flag is set to 1 while the RIE bit is set to 1 and interrupt requests

are enabled, a receive-data-full interrupt (RXI) will be requested. If an error occurs in reception

and either the ORER flag or the PER flag is set to 1, a transmit/receive-error interrupt (ERI) will

be requested.

If the RXI interrupt activates the DMAC, the number of bytes designated in the DMAC will be

transferred, skipping receive data in which an error occurred.

For details, see Interrupt Operations and Data Transfer by DMAC in this section.

If a parity error occurs during reception and the PER flag is set to 1, the received data is

transferred to RDR, so the erroneous data can be read.

H8/3028F Datasheet(PDF) 561 Page - Renesas Technology Corp