H8SLASH3028F datasheet(651/923 Pages) RENESAS

651 / 923 page

Rev. 2.00, 09/03, page 621 of 890

Period during which flash memory access is prohibited

(x: Wait time after setting SWE bit, y: Wait time after clearing SWE bit)*

Period during which flash memory can be programmed

(Execution of program in flash memory prohibited, and data reads other than verify operations prohibited)

VCC

FWE

tOSC1

Min 0

µs

tMDS

tRESW

MD2 to MD0

RES

SWE bit

Mode

change*

User

mode

Boot

mode

User program mode

SWE set

SWE

cleared

Mode

change*

User

mode

User program

mode

Notes: 1. When entering boot mode or making a transition from boot mode to another mode, mode switching must be carried

out by means of

RES input. The state of ports with multiplexed address functions and bus control output pins

(

CSn, AS, RD, WR) will change during this switchover interval (the interval during which the RES pin input is low),

and therefore these pins should not be used as output signals during this time.

2. When making a transition from boot mode to another mode, the mode programming setup time t

MDS must be

satisfied with respect to

RES clearance timing.

See section 21.2.6, Flash Memory Characteristics.

Figure 18.18 Mode Transition Timing

(Example: Boot Mode

→

→ User Mode ↔

↔

↔ User Program Mode)

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