H8SLASH3028F datasheet(864/923 Pages) RENESAS

864 / 923 page

Rev. 2.00, 09/03, page 834 of 890

ADCSR—A/D Control/Status Register

H'FFFE8

A/D

R/(W)

ADF

R/W

ADIE

R/W

ADST

R/W

SCAN

R/W

CKS

R/W

CH2

R/W

CH1

R/W

CH0

Channel select 2 to 0

Group

Selection

AN0

AN1

AN2

AN3

AN4

AN5

AN6

AN7

CH2

Description

Single Mode

Scan Mode

Clock select

Conversion time =

134 states (maximum)

Conversion time =

70 states (maximum)

Channel

Selection

CH1 CH0

AN0

AN0, AN1

AN0 to AN2

AN0 to AN3

AN4

AN4, AN5

AN4 to AN6

AN4 to AN7

Scan mode

Single mode

Scan mode

A/D start

A/D conversion is stopped

Single mode: A/D conversion starts; ADST is automatically cleared to 0

when conversion ends

Scan mode: A/D conversion starts and continues, cycling among the

selected channels ADST is cleared to 0 by software,

by a reset, or by a transition to standby mode

A/D interrupt enable

A/D end interrupt request is disabled

A/D end interrupt request is enabled

A/D end flag

[Clearing conditions]

• Read ADF when ADF = 1, then write 0 in ADF

• The DMAC is activated by an ADI interrupt

[Setting conditions]

• Single mode: A/D conversion ends

• Scan mode: A/D conversion ends in all selected channels

Note:

* Only 0 can be written, to clear the flag.

Bit

Initial value

Read/Write

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