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H8/3028F Datasheet(PDF) 280 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 280 Page - Renesas Technology Corp |
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280 / 923 page  Rev. 2.00, 09/03, page 250 of 890 8.2 Port 1 8.2.1 Overview Port 1 is an 8-bit input/output port also used for address output, with the pin configuration shown in figure 8.1. The pin functions differ between the expanded modes with on-chip ROM disabled, expanded modes with on-chip ROM enabled, and single-chip mode. In modes 1 to 4 (expanded modes with on-chip ROM disabled), they are address bus output pins (A7 to A0). In mode 5 (expanded modes with on-chip ROM enabled), settings in the port 1 data direction register (P1DDR) can designate pins for address bus output (A7 to A0) or generic input. In modes 6 and 7 (single-chip mode), port 1 is a generic input/output port. When DRAM is connected to area 2, 3, 4, 5, A7 to A0 output row and column addresses in read and write cycles. For details see section 6.5, DRAM Interface. Pins in port 1 can drive one TTL load and a 90-pF capacitive load. They can also drive an LED or a darlington transistor pair. Port 1 P1 /A P1 /A P1 /A P1 /A P1 /A P1 /A P1 /A P1 /A 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 P1 (input/output) P1 (input/output) P1 (input/output) P1 (input/output) P1 (input/output) P1 (input/output) P1 (input/output) P1 (input/output) 7 6 5 4 3 2 1 0 A (output) A (output) A (output) A (output) A (output) A (output) A (output) A (output) 7 6 5 4 3 2 1 0 Port 1 pins Modes 6 and 7 Modes 1 to 4 P1 (input)/A (output) P1 (input)/A (output) P1 (input)/A (output) P1 (input)/A (output) P1 (input)/A (output) P1 (input)/A (output) P1 (input)/A (output) P1 (input)/A (output) 7 6 5 4 3 2 1 0 Mode 5 7 6 5 4 3 2 1 0 Figure 8.1 Port 1 Pin Configuration |
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