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H8/3028F Datasheet(PDF) 308 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 308 Page - Renesas Technology Corp |
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308 / 923 page  Rev. 2.00, 09/03, page 278 of 890 Pin Pin Functions and Selection Method The DRAM interface settings by bits DRAS2 to DRAS0 in DRCRA, and bit P8 1 DDR, select the pin function as follows. DRAM interface settings (1) in table below (2) in table below (3) in table below P81DDR 0101 — P8 1 input pin CS 3 output pin P8 1 input pin P8 1 output pin CS3 output pin* Pin function IRQ1 input pin Note: * CS3 is output as RAS3. DRAM interface setting (1) (3) (2) (3) (2) DRAS2 0 1 DRAS1 01 01 P81/CS3/IRQ1 DRAS0 0101 0101 Bit RFSHE in DRCRA and bit P8 0 DDR select the pin function as follows. RFSHE 0 1* P80DDR 0 1 — P80 input P80 output RFSH output P80/RFSH/IRQ0 Pin function IRQ0 input Note: * If areas 2 to 5 are not designated as DRAM space, this bit should not be set to 1. |
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