TS68HC901 datasheet(18/42 Pages) STMICROELECTRONICS

18 / 42 page

in the pulse width measurement mode is shown in

Figure 12.

The pulse width measurement mode functions simi-

larly to the delay mode, with the auxiliary control si-

gnal acting as an enable to the timer. When the

control signal is active, the prescaler and main coun-

ter are allowed to operate. When the control signal

is negated, the timer is stopped. So, the width of the

active pulse on TAI or TBI is measured by the num-

ber of timer counts which occur while the timer is al-

lowed to operate.

The active state of the auxiliary input line is defined

by the associated interrupt channel’s edge bit in the

active edge register (AER). GPIP4 of the AER is the

edge bit associated with TAI and GPIP3 is associa-

ted with TBI. When the edge bit is a one, the auxiliary

input will be active high, enabling the timer while the

input signal is at a high level. If the edge bit is low,

the auxiliary input will be active low and the timer will

operate while the input signal is at a low level.

The state of the active edge bit also specifies whe-

ther a zero-to-one transition or a one-to-zero trans-

ition of the auxiliary input pin will produce an interrupt

when the interrupt channel is enabled. In normal o-

peration, programming the active edge bit to a one

will produce an interrupt on the zero-to-one trans-

ition of the associated input signal. Alternately, pro-

gramming the edge bit to a zero will produce an in-

terrupt on the one-to-zero transition of the input si-

gnal. However, in the pulse width measurement

mode, the interrupt generated by a transition on TAI

or TBI will occur on the opposite transition as that

normally defined by the edge bit.

For example, in the pulse width measurement

mode, if the edge bit is a one, the timer will be allo-

wed to run while the auxiliary input TAI is high. When

TAI transitions from high to low, the timer will stop

and, if the interrupt channel is enabled, an interrupt

will occur. By having the interrupt occur on the one-

to-zero transition instead of the zero-to-one trans-

ition, the processor will be interrupted when the

pulse being measured has terminated and the width

of the pulse is available from the timer. Therefore,

the timers act like a divide-by-prescaler that can be

programmed by the timer data register and the ti-

mer’s A and B control register.

After reading the contents of the timer, the main

counter must be reinitialized by writing to the timer

data register to allow consecutive pulses to be mea-

sured. If the timer is written after the auxiliary input

signal is active, the timer will count from the previous

contents of the timer data register until it counts

through 01 (hexadecimal). At the time, the main

counter is loaded with the value from the timer data

Figure 12 :

TS68HC901

18/42

TS68HC901 Datasheet(PDF) 18 Page - STMicroelectronics

TS68HC901 Datasheet(HTML) 18 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

Datasheet Download

Link URL