P89LPC954 datasheet(47/69 Pages) NXP

47 / 69 page

P89LPC952_954_4

Product data sheet

Rev. 04 — 24 July 2008

47 of 69

NXP Semiconductors

P89LPC952/954

8-bit microcontroller with 10-bit ADC

ADC

8.1 General description

The P89LPC952/954 has a 10-bit, 8-channel multiplexed successive approximation ADC

module. A block diagram of the ADC is shown in Figure 17. The ADC consists of an

8-input multiplexer which feeds a sample-and-hold circuit providing an input signal to one

of two comparator inputs. The control logic in combination with the SAR drives a DAC

which provides the other input to the comparator. The output of the comparator is fed to

the SAR.

8.2 Features

I 10-bit, 8-channel multiplexed input, successive approximation ADC.

I Eight result register pairs.

I Six operating modes:

N Fixed channel, single conversion mode.

N Fixed channel, continuous conversion mode.

N Auto scan, single conversion mode.

N Auto scan, continuous conversion mode.

N Dual channel, continuous conversion mode.

N Single step mode.

I Three conversion start modes:

N Timer triggered start.

N Start immediately.

N Edge triggered.

I 10-bit conversion time of 4 µs at an A/D clock of 9 MHz.

I Interrupt or polled operation.

I High and low boundary limits interrupt; selectable in or out-of-range.

I Clock divider.

I Power-down mode.

8.3 Block diagram

Fig 17. ADC block diagram

–

comp

DAC0

SAR

INPUT

MUX

CONTROL

LOGIC

CCLK

002aab103

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