PCF8562TTSLASHS400SLASH2 datasheet(19/36 Pages) NXP

19 / 36 page

PCF8562_3

Product data sheet

Rev. 3 — 2 December 2008

19 of 36

NXP Semiconductors

PCF8562

Universal LCD driver for low multiplex rates

7.16 Characteristics of the I2C-bus

The I2C-bus is for bidirectional, two-line communication between different ICs or modules.

The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be

connected to a positive supply via a pull-up resistor when connected to the output stages

of a device. Data transfer may be initiated only when the bus is not busy.

7.16.1 Bit transfer

One data bit is transferred during each clock pulse. The data on the SDA line must remain

stable during the HIGH period of the clock pulse as changes in the data line at this time

will be interpreted as a control signal (see Figure 11).

7.16.2 START and STOP conditions

Both data and clock lines remain HIGH when the bus is not busy.

A HIGH-to-LOW transition of the data line while the clock is HIGH is deﬁned as the START

condition - S.

A LOW-to-HIGH transition of the data line while the clock is HIGH is deﬁned as the STOP

condition - P (see Figure 12).

7.16.3 System conﬁguration

A device generating a message is a transmitter, a device receiving a message is the

receiver. The device that controls the message is the master and the devices which are

controlled by the master are the slaves (see Figure 13).

Fig 11. Bit transfer

mba607

data line

stable;

data valid

change

of data

allowed

SDA

SCL

Fig 12. Deﬁnition of START and STOP conditions

mbc622

SDA

SCL

STOP condition

SDA

SCL

START condition

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