CS43L22 datasheet(7/68 Pages) CIRRUS

7 / 68 page

DS792F1

CS43L22

Confidential Draft

10/7/08

1. PIN DESCRIPTIONS

Pin Name

Pin Description

SDA

Serial Control Data (Input/Output) - SDA is a data I/O in I²C Mode.

SCL

Serial Control Port Clock (Input) - Serial clock for the serial control port.

AD0

Address Bit 0 (I²C) (Input) - AD0 is a chip address pin in I²C Mode;

SPKR_OUTA+

SPKR_OUTA-

SPKR_OUTB+

SPKR_OUTB-

PWM Speaker Output (Output) - Full-bridge amplified PWM speaker outputs.

Power for PWM Drivers (Input) - Power supply for the PWM output driver stages.

-VHPFILT

Inverting Charge Pump Filter Connection (Output) - Power supply from the inverting charge

pump that provides the negative rail for the headphone/line amplifiers.

FLYN

Charge Pump Cap Negative Node (Output) - Negative node for the inverting charge pump’s fly-

ing capacitor.

FLYP

Charge Pump Cap Positive Node (Output) - Positive node for the inverting charge pump’s flying

capacitor.

+VHP

Positive Analog Power for Headphone (Input) - Positive voltage rail and power for the internal

headphone amplifiers and inverting charge pump.

HP/LINE_OUTB, A

14,15 Headphone/Line Audio Output (Output) - Stereo headphone or line level analog outputs.

Analog Power (Input) - Positive power for the internal analog section.

GND/Thermal Pad

SDA

AIN4A

AIN2A

AD0

SPKR_OUTA+

SPKR_OUTB-

-VHPFILT

AIN4B

AIN1B

AIN2B

AFILTB

AIN3B

AFILTA

AIN1A

AIN3A

SPKR_OUTB+

SCL

SPKR_OUTA-

Top-Down (Through-Package) View

40-Pin QFN Package

CS43L22 Datasheet(PDF) 7 Page - Cirrus Logic

CS43L22 Datasheet(HTML) 7 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

Datasheet Download

Link URL