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CS42888-CQZ Datasheet(PDF) 45 Page - Cirrus Logic |
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CS42888-CQZ Datasheet(HTML) 45 Page - Cirrus Logic |
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45 / 61 page ![]() DS717F2 45 CS42888 6.6.2 DAC De-Emphasis Control (DAC_DEM) Default = 0 0 - No De-Emphasis 1 - De-Emphasis Enabled (Auto-Detect Fs) Function: Enables the digital filter to maintain the standard 15 μs/50μs digital de-emphasis filter response at the auto-detected sample rate of either 32, 44.1, or 48 kHz. De-emphasis will not be enabled, regardless of this register setting, at any other sample rate. 6.6.3 ADC1 Single-Ended Mode (ADC1 SINGLE) Default = 0 0 - Disabled; Differential input to ADC1 1 - Enabled; Single-Ended input to ADC1 Function: When enabled, this bit allows the user to apply a single-ended input to the positive terminal of ADC1. A +6 dB digital gain is automatically applied to the serial audio data of ADC1. The negative leg must be driv- en to the common mode of the ADC. See Figure 26 on page 51 for a graphical description. 6.6.4 ADC2 Single-Ended Mode (ADC2 SINGLE) Default = 0 0 - Disabled; Differential input to ADC2 1 - Enabled; Single-Ended input to ADC2 Function: When enabled, this bit allows the user to apply a single-ended input to the positive terminal of ADC2. A +6 dB digital gain is automatically applied to the serial audio data of ADC2. The negative leg must be driv- en to the common mode of the ADC. See Figure 26 on page 51 for a graphical description. 6.7 Transition Control (Address 06h) 6.7.1 Single Volume Control (DAC_SNGVOL, ADC_SNGVOL) Default = 0 Function: The individual channel volume levels are independently controlled by their respective Volume Control reg- isters when this function is disabled. When enabled, the volume on all channels is determined by the AOUT1 and AIN1 Volume Control register and the other Volume Control registers are ignored. 76 54 3 2 1 0 DAC_SNGVOL DAC_SZC1 DAC_SZC0 AMUTE MUTE ADC_SP ADC_SNGVOL ADC_SZC1 ADC_SZC0 |
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