UPSD3254A datasheet(38/175 Pages) STMICROELECTRONICS

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UPSD3254A, UPSD3254BV, UPSD3253B, UPSD3253BV

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Table 17. PSD Module Register Address Offset

CSIOP

Addr

Offset

Bit Register Name

Reset

Value

Comments

Data In (Port A)

Reads Port pins as input

Control (Port A)

Configure pin between I/O or Address Out Mode. Bit = 0 selects I/O

Data Out (Port A)

Latched data for output to Port pins, I/O Output Mode

Direction (Port A)

Configures Port pin as input or output. Bit = 0 selects input

Drive (Port A)

Configures Port pin between CMOS, Open Drain or Slew rate. Bit =

0 selects CMOS

Input Macrocell

(Port A)

Reads latched value on Input Macrocells

Enable Out

(Port A)

Reads the status of the output enable control to the Port pin driver.

Bit = 0 indicates pin is in input mode.

Data In (Port B)

Control (Port B)

Data Out (Port B)

Direction (Port B)

Drive (Port B)

Input Macrocell

(Port B)

Enable Out

(Port B)

Data In (Port C)

Data Out (Port C)

Direction (Port C)

Drive (Port C)

Input Macrocell

(Port C)

Enable Out

(Port C)

Data In (Port D)

Only Bit 1 and

2 are used

Data Out (Port D)

Only Bit 1 and

2 are used

Direction (Port D)

Only Bit 1 and

2 are used

Drive (Port D)

Only Bit 1 and

2 are used

Enable Out

(Port D)

Only Bit 1 and

2 are used

Output

Macrocells AB

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