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CDK8307 Datasheet(PDF) 14 Page - Cadeka Microcircuits LLC.

Part # CDK8307
Description  12/13-bit, 20/40/50/65MSPS, Eight Channel, Ultra Low Power ADC with LVDS
PDF  29 Pages
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Manufacturer  CADEKA [Cadeka Microcircuits LLC.]
Direct Link  http://www.cadeka.com
Logo CADEKA - Cadeka Microcircuits LLC.

CDK8307 Datasheet(HTML) 14 Page - Cadeka Microcircuits LLC.

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©2009 CADEKA Microcircuits LLC
www.cadeka.com
14
PRELIMINARY Data Sheet
LCLKP
LCLKN
Dxx<1:0>
tdata
TLVDS
TLVDS/2
LCLKP
LCLKN
FCLKN
FCLKP
Dxx<1:0>
ADC Clock
Analog Input
D10
N-2
D11
N-2
D0
N-1
D1
N-1
D2
N-1
D3
N-1
D4
N-1
D5
N-1
D6
N-1
D7
N-1
D8
N-1
D9
N-1
D10
N-1
D11
N-1
D0
N
D1
N
D2
N
D3
N
D4
N
D5
N
D6
N
D7
N
D8
N
D9
N
D10
N
TLVDS
TPROP
LCLKP
LCLKN
FCLKN
FCLKP
Dxx<1:0>
ADC Clock
Analog Input
D0
N-1
D1
N-1
D2
N-1
D3
N-1
D4
N-1
D5
N-1
D6
N-1
D7
N-1
D8
N-1
D9
N-1
D10
N-1
D11
N-1
D12
N-1
D13
N-1
D1
N
D3
N
D2
N
D5
N
D0
N
D4
N
D6
N
D7
N
D8
N
D9
N
D10
N
D11
N
D12
N
D13
N
TLVDS
TPROP
LCLKP
LCLKN
FCLKN
FCLKP
Dxx<1:0>
ADC Clock
Analog Input
D10
N-2
D11
N-2
D0
N-1
D1
N-1
D2
N-1
D3
N-1
D4
N-1
D5
N-1
D6
N-1
D7
N-1
D8
N-1
D9
N-1
D10
N-1
D11
N-1
D1
N
D3
N
D2
N
D5
N
D0
N
D4
N
D6
N
D7
N
D8
N
D9
N
D10
N
TLVDS
TPROP
LVDS Timing Diagrams
Figure 1. 12-bit Output, DDR Mode
Figure 2. 14-bit Output, DDR Mode
Figure 3. 12-bit Output, SDR Mode
Figure 4. Data Timing



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