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TMS320LF2407 Datasheet(PDF) 21 Page - Texas Instruments |
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TMS320LF2407 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 106 page  TMS320LF2407, TMS320LF2406, TMS320LF2402 TMS320LC2406, TMS320LC2404, TMS320LC2402 DSP CONTROLLERS SPRS094C – APRIL 1999 – REVISED OCTOBER 1999 21 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 peripheral memory map of the ’LF240x/’LC240x Illegal Illegal Illegal Illegal Illegal Illegal Illegal Illegal Reserved Reserved 70C0–70FF General-Purpose Timer Registers Flag Registers Event Manager – EVB Deadband Registers Compare, PWM, and Interrupt Mask, Vector, and Capture and QEP Registers 7500–7508 7511–7519 7520–7529 752C–7531 7532–753F 7432–743F 742C–7431 7420–7429 7411–7419 7400–7408 Reserved Flag Registers Interrupt Mask, Vector and Capture and QEP Registers Deadband Registers Compare, PWM, and Timer Registers General-Purpose Event Manager – EVA 7230–73FF 7100–722F 70A0–70BF 7090–709F 7080–708F 7070–707F 7060–706F 7050–705F 7040–704F 7030–703F 7020–702F 7010–701F 7000–700F CAN Control Registers ADC Control Registers Digital I/O Control Registers External-Interrupt Registers SCI SPI Watchdog Timer Registers Control Registers System Configuration and Hex Hex 005F 0007 0006 0005 0004 0003 0000 and Reserved Emulation Registers Interrupt Flag Register Register (Reserved) Global-Memory Allocation Interrupt-Mask Register FFFF 8000 7FFF 7540 753F 7500 74FF 7440 743F 7400 73FF 7000 6FFF 0800 07FF 0400 03FF 0300 02FF 0200 01FF 0080 007F 0060 005F 0000 External Illegal Peripheral Frame 3 (PF3) Peripheral Frame 2 (PF2) Peripheral Frame 1 (PF1) Reserved On-Chip DARAM B1 On-Chip DARAM B0 Reserved On-Chip DARAM B2 and Reserved Memory-Mapped Registers “Illegal” indicates that access to these addresses causes a nonmaskable interrupt (NMI). Reserved Illegal “Reserved” indicates addresses that are reserved for test and future expansion. |
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