LTC6412CUFPBF datasheet(20/24 Pages) LINER

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LTC6412

6412f

Figure 4. 4-Port Analysis Schematic. Test Circuit B

+IN

10nF

3.3V

1nF

0.1μF

+OUT

IDC

–OUT

6412 F04

0.1μF

GAIN CONTROL

(– SLOPE MODE)

INPUT REF

PLANE

OUTPUT REF

PLANE

LTC6412

–IN

PORT 3

50Ω

PORT 4

50Ω

1/2 AGILENT

E5071C

PORT 1

50Ω

PORT 2

50Ω

1/2 AGILENT

E5071C

IDC

200Ω

50Ω

12.5Ω

50Ω

DUT

1:1

IDEAL

TRANSFORMER WITH CENTER TAP

1:1

IDEAL

TRANSFORMER WITH CENTER TAP

DIFFERENTIAL

MODE

PORT 2

DIFFERENTIAL

MODE

PORT 1

COMMON

MODE

PORT 2

COMMON

MODE

PORT 1

+OUT

+IN

–OUT

–IN

6412 F05

Figure 5. Schematic of Mixed-Mode S-Parameters Reported for Test Circuit B

Figure 6. Deﬁnition of Mixed-Mode S-Parameters Reported for Test Circuit B

S xyAB

S xyAB =

STIMULUS PORT NUMBER

RESPONSE PORT NUMBER

STIMULUS PORT MODE

RESPONSE PORT MODE

d: DIFFERENTIAL MODE (BALANCED)

c: COMMON MODE (BALANCED)

x MODE SIGNAL OUTPUT ON PORT A

y MODE SIGNAL INPUT ON PORT B

MODE

6412 F06

APPLICATIONS INFORMATION

LTC6412CUFPBF Datasheet(PDF) 20 Page - Linear Technology

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