SRAM

SRAM

SRAM

SRAM

SRAM

AS8S512K32

& AS8S512K32A

AS8S512K32 & AS8S512K32A

Rev. 6.0 6/05

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

5

Austin Semiconductor, Inc.

ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS

MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX

READ cycle time

12

15

17

20

25

35

45

55

ns

Address access time

12

15

17

20

25

35

45

55

ns

Chip select access time

12

15

17

20

25

35

45

55

ns

Output hold from address change

22

222222

ns

Chip select to output in Low-Z

22

222222

ns

4,6,7

Chip select to output in High-Z

78

9

1012152020

ns

4,6,7

Output enable access time

78

9

1012152020

ns

Output enable to output in Low-Z

00

000000

ns

4,6

Output disable to output in High-Z

12

12

12

15

20

20

ns

4,6

WRITE cycle time

12

15

17

20

25

35

45

55

ns

Chip select to end of write

10

12

15

15

17

20

25

25

ns

Address valid to end of write

10

12

15

15

17

20

25

25

ns

Address setup time

22222222

ns

Address hold from end of write

11111111

ns

WRITE pulse width

10

12

15

15

17

20

25

25

ns

WRITE pulse width

10

12

15

15

17

20

25

25

ns

Data setup time

8

10121012152020

ns

Data hold time

00000000

ns

Write disable to output in Low-z

22222222

ns

4,6,7

Write enable to output in High-Z

7

8

9

1113151515

ns

4,6,7

UNITS

-35

-12

-15

-45

-55

WRITE CYCLE

READ CYCLE

DESCRIPTION

-20

-17

-25

SYMBOL

NOTES