AD9551SLASHPCBZ datasheet(40/40 Pages) AD

40 / 40 page

AD9551

Rev. B | Page 40 of 40

COMPLIANT TO JEDEC STANDARDS MO-220-VJJD-2

OUTLINE DIMENSIONS

3.05

2.90 SQ

2.75

TOP VIEW

6.00

BSC SQ

5.75

BSC SQ

COPLANARITY

0.08

4.50

REF

0.50

0.40

0.30

0.50

BSC

0.60 MAX

PIN 1

INDICATOR

0.25 MIN

EXPOSED

PAD

BOTTOM VIEW

PIN 1

INDICATOR

0.30

0.23

0.18

0.20 REF

12° MAX

0.80 MAX

0.65 TYP

1.00

0.85

0.80

0.05 MAX

0.02 NOM

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

SECTION OF THIS DATA SHEET.

SEATING

PLANE

Figure 32. 40-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

6 × 6 mm Body, Very Thin Quad

(CP-40-8)

Dimensions shown in millimeters

ORDERING GUIDE

Model

Temperature Range

Package Description

Package Option

AD9551BCPZ1

–40°C to +85°C

40-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

CP-40-8

AD9551BCPZ-REEL71

–40°C to +85°C

40-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

CP-40-8

AD9551/PCBZ1

Evaluation Board

1 Z = RoHS Compliant Part.

registered trademarks are the property of their respective owners.

D07805-0-9/09(B)

AD9551/PCBZ Datasheet(PDF) 40 Page - Analog Devices

AD9551/PCBZ Datasheet(HTML) 40 Page - Analog Devices

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