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STM32F101XC Datasheet(PDF) 59 Page - STMicroelectronics

Part # STM32F101XC
Description  High-density access line, ARM-based 32-bit MCU with 256 to 512 KB Flash, 9 timers, 1 ADC and 10 communication interfaces
PDF  106 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F101XC Datasheet(HTML) 59 Page - STMicroelectronics

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STM32F101xC, STM32F101xD, STM32F101xE
Electrical characteristics
Doc ID 14610 Rev 7
59/106
Table 33.
Asynchronous multiplexed NOR/PSRAM read timings(1)(2)
1.
CL = 15 pF.
2.
Based on characterization, not tested in production.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
7THCLK – 2
7THCLK + 2
ns
tv(NOE_NE)
FSMC_NEx low to FSMC_NOE low
3THCLK – 0.5 3THCLK + 1.5 ns
tw(NOE)
FSMC_NOE low time
4THCLK – 1
4THCLK + 2
ns
th(NE_NOE)
FSMC_NOE high to FSMC_NE high hold time
–1
ns
tv(A_NE)
FSMC_NEx low to FSMC_A valid
0
ns
tv(NADV_NE)
FSMC_NEx low to FSMC_NADV low
3
5
ns
tw(NADV)
FSMC_NADV low time
THCLK –1.5
THCLK + 1.5
ns
th(AD_NADV)
FSMC_AD (address) valid hold time after
FSMC_NADV high
THCLK
ns
th(A_NOE)
Address hold time after FSMC_NOE high
THCLK
ns
th(BL_NOE)
FSMC_BL hold time after FSMC_NOE high
0
ns
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
0
ns
tsu(Data_NE)
Data to FSMC_NEx high setup time
2THCLK + 24
ns
tsu(Data_NOE) Data to FSMC_NOE high setup time
2THCLK + 25
ns
th(Data_NE)
Data hold time after FSMC_NEx high
0
ns
th(Data_NOE)
Data hold time after FSMC_NOE high
0
ns



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