STM32W108HB datasheet(115/179 Pages) STMICROELECTRONICS

115 / 179 page

STM32W108CB, STM32W108HB

General-purpose timers

Doc ID 16252 Rev 2

115/179

[15] TIM_ETP: External Trigger Polarity

This bit selects whether ETR or the inverse of ETR is used for trigger operations.

0: ETR is non-inverted, active at a high level or rising edge.

1: ETR is inverted, active at a low level or falling edge.

[14] TIM_ECE: External Clock Enable

This bit enables external clock mode 2.

0: External clock mode 2 disabled.

1: External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF

signal.

Note: Setting the TIM_ECE bit has the same effect as selecting external clock mode 1 with

TRGI connected to ETRF (TIM_SMS=111 and TIM_TS=111).

It is possible to use this mode simultaneously with the following slave modes: reset

mode, gated mode and trigger mode. TRGI must not be connected to ETRF in this case

(the TIM_TS bits must not be 111).

If external clock mode 1 and external clock mode 2 are enabled at the same time, the

external clock input will be ETRF.

[13:12] TIM_ETPS: External Trigger Prescaler

External trigger signal ETRP frequency must be at most 1/4 of CK frequency. A prescaler can

be enabled to reduce ETRP frequency. It is useful with fast external clocks.

00: ETRP prescaler off.

01: Divide ETRP frequency by 2.

10: Divide ETRP frequency by 4.

11: Divide ETRP frequency by 8.

[11:8] TIM_ETF: External Trigger Filter

This defines the frequency used to sample the ETRP signal, Fsampling, and the length of the

digital filter applied to ETRP. The digital filter is made of an event counter in which N events are

needed to validate a transition on the output:

0000: Fsampling=PCLK, no filtering.1111: Fsampling=PCLK/32, N=8.

0001: Fsampling=PCLK, N=2.1110: Fsampling=PCLK/32, N=6.

0010: Fsampling=PCLK, N=4.1101: Fsampling=PCLK/32, N=5.

0011: Fsampling=PCLK, N=8.1100: Fsampling=PCLK/16, N=8.

0100: Fsampling=PCLK/2, N=6.1011: Fsampling=PCLK/16, N=6.

0101: Fsampling=PCLK/2, N=8.1010: Fsampling=PCLK/16, N=5.

0110: Fsampling=PCLK/4, N=6.1001: Fsampling=PCLK/8, N=8.

0111: Fsampling=PCLK/4, N=8.1000: Fsampling=PCLK/8, N=6.

Note: PCLK is 12 MHz when the STM32W108 is using the 24 MHz crystal oscillator, and 6

MHz if using the 12 MHz RC oscillator.

STM32W108HB Datasheet(PDF) 115 Page - STMicroelectronics