PIC18F8722-ESLASHPTSQTP datasheet(70/446 Pages) MICROCHIP

70 / 446 page

PIC18F8722 FAMILY

DS39646C-page 68

5.1.3.4

Stack Full and Underflow Resets

Device Resets on stack overflow and stack underflow

conditions are enabled by setting the STVREN bit in

Configuration Register 4L. When STVREN is set, a full

or underflow will set the appropriate STKFUL or

STKUNF bit and then cause a device Reset. When

STVREN is cleared, a full or underflow condition will set

the appropriate STKFUL or STKUNF bit, but not cause

a device Reset. The STKFUL or STKUNF bits are

cleared by the user software or a Power-on Reset.

5.1.4

FAST REGISTER STACK

A fast register stack is provided for the STATUS,

WREG and BSR registers, to provide a “fast return”

option for interrupts. The stack for each register is only

one level deep and is neither readable nor writable. It is

loaded with the current value of the corresponding reg-

ister when the processor vectors for an interrupt. All

interrupt sources will push values into the Stack regis-

ters. The values in the registers are then loaded back

into their associated registers if the RETFIE, FAST

instruction is used to return from the interrupt.

If both low and high-priority interrupts are enabled, the

stack registers cannot be used reliably to return from

low-priority interrupts. If a high-priority interrupt occurs

while servicing a low-priority interrupt, the Stack regis-

ter values stored by the low-priority interrupt will be

overwritten. In these cases, users must save the key

registers in software during a low-priority interrupt.

If interrupt priority is not used, all interrupts may use the

fast register stack for returns from interrupt. If no inter-

rupts are used, the fast register stack can be used to

restore the STATUS, WREG and BSR registers at the

end of a subroutine call. To use the fast register stack

for a subroutine call, a CALL label, FAST instruction

must be executed to save the STATUS, WREG and

BSR

registers

the

fast

stack.

RETURN

, FAST instruction is then executed to restore

these registers from the fast register stack.

Example 5-1 shows a source code example that uses

the fast register stack during a subroutine call and return.

EXAMPLE 5-1:

FAST REGISTER STACK

CODE EXAMPLE

5.1.5

LOOK-UP TABLES IN PROGRAM

MEMORY

There may be programming situations that require the

creation of data structures, or look-up tables, in

program memory. For PIC18 devices, look-up tables

can be implemented in two ways:

• Computed GOTO

• Table Reads

5.1.5.1

Computed GOTO

A computed GOTO is accomplished by adding an offset

to the program counter. An example is shown in

Example 5-2.

A look-up table can be formed with an ADDWF

PCL

instruction and a group of RETLW nn instructions. The W

cuting a call to that table. The first instruction of the called

routine is the ADDWF PCL instruction. The next instruction

executed will be one of the RETLW nn instructions that

returns the value ‘nn’ to the calling function.

The offset value (in WREG) specifies the number of

bytes that the program counter should advance and

should be multiples of 2 (LSb = 0).

In this method, only one data byte may be stored in

each instruction location and room on the return

address stack is required.

EXAMPLE 5-2:

COMPUTED GOTO USING AN OFFSET VALUE

Note:

The “ADDWF

PCL

” instruction does not

update the PCLATH and PCLATU registers.

A read operation on PCL must be performed

to update PCLATH and PCLATU.

CALL SUB1, FAST

;STATUS, WREG, BSR

;SAVED IN FAST REGISTER

;STACK

•

SUB1

•

RETURN, FAST

;RESTORE VALUES SAVED

;IN FAST REGISTER STACK

MAIN:

ORG

0x0000

MOVLW

0x00

CALL

TABLE

…

ORG

0x8000

TABLE

MOVF

PCL, F

; A simple read of PCL will update PCLATH, PCLATU

RLNCF

W, W

; Multiply by 2 to get correct offset in table

ADDWF

PCL

; Add the modified offset to force jump into table

RETLW

‘A’

RETLW

‘B’

RETLW

‘C’

RETLW

‘D’

RETLW

‘E’

END

PIC18F8722-E/PTSQTP Datasheet(PDF) 70 Page - Microchip Technology

PIC18F8722-E/PTSQTP Datasheet(HTML) 70 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL