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PIC18F2221 Datasheet(PDF) 152 Page - Microchip Technology |
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PIC18F2221 Datasheet(HTML) 152 Page - Microchip Technology |
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152 / 402 page  PIC18F2221/2321/4221/4321 FAMILY DS39689F-page 152 © 2009 Microchip Technology Inc. TABLE 16-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2 Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset Values on page INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 55 RCON IPEN SBOREN(1) — RI TO PD POR BOR 54 PIR1 PSPIF(2) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 58 PIE1 PSPIE(2) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 58 IPR1 PSPIP(2) ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 58 TRISB PORTB Data Direction Register 58 TRISC PORTC Data Direction Register 58 TMR2 Timer2 Register 56 PR2 Timer2 Period Register 56 T2CON — T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 56 CCPR1L Capture/Compare/PWM Register 1 Low Byte 57 CCPR1H Capture/Compare/PWM Register 1 High Byte 57 CCP1CON P1M1(2) P1M0(2) DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 57 CCPR2L Capture/Compare/PWM Register 2 Low Byte 57 CCPR2H Capture/Compare/PWM Register 2 High Byte 57 CCP2CON — — DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 57 ECCP1AS ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1(2) PSSBD0(2) 57 ECCP1DEL PRSEN PDC6(2) PDC5(2) PDC4(2) PDC3(2) PDC2(2) PDC1(2) PDC0(2) 57 Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2. Note 1: The SBOREN bit is only available when the BOREN<1:0> Configuration bits = 01; otherwise, it is disabled and reads as ‘0’. See Section 5.4 “Brown-out Reset (BOR)”. 2: These bits are unimplemented on 28-pin devices and read as ‘0’. |
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